Hardware

Input channels

The Time Tagger has 8 or 18 input channels (SMA-connectors). The electrical characteristics are tabulated below. Both rising and falling edges are detected on the input channels. In the software, rising edges correspond to channel numbers 1 to 8 (Ultra: 1 to 18) and falling edges correspond to respective channel numbers -1 to -8 (Ultra: -1 to -18). Thereby, you can treat rising and falling edges in a fully equivalent fashion.

Electrical characteristics

Property

Time Tagger 20

Time Tagger Ultra

Termination

50 Ohm

50 Ohm

Input voltage range

0.0 to 5.0 V

-5.0 to 5.0 V

Trigger level range

0.0 to 2.5 V

-2.5 to 2.5 V

Minimum signal level

100 mV

100 mV

Minimum pulse width

1.0 ns

0.5 ns

High Resolution Mode (beta)

The Time Tagger Ultra Performance can operate in different High Resolution (HighRes) modes. An increased resolution is achieved by directing the signal from a single input to multiple time-to-digital conversions (TDCs). Depending on the mode, 2, 4, or 8 TDCs are used per input. By averaging the results, a single timestamp with lower jitter is generated. On the other hand, this process reduces the number of usable signal inputs.

The table shows the usable inputs for the different modes. Channels available with the minimal four-channel license are shown without parenthesis. Further channels are added from the list in parenthesis in the HighRes column first and added in the Standard resolution column if the amount of HighRes channels is exhausted.

Mode

HighRes channels

Standard channels

Standard

1 - 4, (5 - 18)

HighResA

1, 3, 5, 7, (10, 12, 14, 16)

(9, 18)

HighResB

1, 5, 10, 14

(9, 18)

HighResC

5, 14

9, 18

Note

As a result of the averaging process, the quality of the calculated timestamps is affected by relative changes of internal delays of the contributing inputs. These delays are affected especially by the temperature of the device. It is strongly recommended to let the device heat up for at least 10 s before starting a measurement. Constant average count rates (averaged over the timescale of hundreds of milliseconds) will provide the best results. If you need more information on this topic, please contact us via support@swabianinstruments.com.

Data connection

The Time Tagger 20 is powered via the USB connection. Therefore, you should ensure that the USB port is capable of providing the full specified current (500 mA). A USB >= 2.0 data connection is required for the performance specified here. Operating the device via a USB hub is strongly discouraged. The Time Tagger 20 can stream about 8 M tags per second.

The data connection of the Time Tagger Ultra is USB 3.0. Therefore the number of tags steamed to the PC can exceed 65 M tags per second. The actual number highly depends on the performance of the CPU the Time Tagger Ultra is connected to and the evaluation methods involved.

Status LEDs

The Time Tagger has two LEDs showing status information. A green LED turns on when the USB power is connected. An RGB LED shows the information tabulated below.

green

firmware loaded

blinking green-orange

time tags are streaming

red flash (0.1 s)

an overflow occurred

continuous red

repeated overflows

LED next to the CLK input

Color

Description

dark

No clock signal

solid green

Valid reference or synchronization signal

solid red

Invalid reference frequency

blinking red

Invalid signal at SYNC IN (AUX IN 1)

blinking yellow

Invalid signal at LOOP IN (AUX IN 2)

Test signal

The Time Tagger has a built-in test signal generator that generates a square wave with a frequency in the range 0.8 to 1.0 MHz. You can apply the test signal to any input channel instead of an external input, this is especially useful for testing, calibrating and setting up the Time Tagger initially.

Virtual channels

The architecture allows you to create virtual channels, e.g., you can create a new channel that represents the sum of two channels (logical OR), or coincidence clicks of two channels (logical AND).

Synthetic input delay

You can introduce an input delay for each channel independently. This is useful if the relative timing between two channels is important e.g., to compensate for propagation delay in cables of unequal length. The input delay can be set individually for rising and for falling edges.

Synthetic dead time

You can introduce a synthetic dead time for each channel independently. This is useful when you want to suppress consecutive clicks that are closely separated, e.g., to suppress after-pulsing of avalanche photodiodes or as a simple way of data rate reduction. The dead time can be set individually for rising and for falling edges in each channel.

Conditional Filter

The Conditional Filter allows you to decrease the time tag rate without losing those time tags that are relevant to your application, for instance, where you have a high-frequency signal applied to at least one channel. Examples include fluorescence lifetime measurements or optical quantum information and cryptography, where you want to capture synchronization clicks from a high repetition rate excitation laser.

To reduce the data rate, you discard all synchronization clicks, except those that follow after one of your low rate detector clicks, thereby forming a reduced time tag stream. The software processes the reduced time tag stream in the exact same fashion as the full time tag stream.

This feature is enabled by the Conditional Filter. As all channels on your Time Tagger are fully equivalent, you can specify which channels are filtered and which channels are used as triggers that enable the transmission of a subsequent tag on the filtered channels.

Note

In Time Tagger 20, the software-defined input delays as set by the method TimeTagger.setInputDelay() do not apply to the Conditional Filter logic.

More details and explanations can be found in the In-Depth Guide More details can be found in the In Depth Guide: Conditional Filter.

Bin equilibration

The discretization of electrical signals is never perfect. In time-to-digital conversion, this manifests as small differences (few ps) of the bin sizes inside the converter that even varies from chip to chip. This imperfection is inherent to any time-to-digital conversion hardware. It is usually not apparent to the user. However, when correlations between two channels are measured on short time scales you might see this as a weak periodic ripple on top of your signal. We reduce the effect of this in the software at the cost of a decrease of the time resolution by \sqrt{2}. This feature is enabled by default. If your application requires time resolution down to the jitter limit, you can disable this feature.

Overflows

The Time Tagger 20 is capable of continuous streaming of about 8 million tags per second on average. For the Time Tagger Ultra continuous tags streamed can exceed 65 million tags per second depending on the CPU the Time Tagger is attached to and the evaluation methods involved. Higher data rates for short times will be buffered internally so that no overflow occurs. This internal buffer is limited, therefore, if continuous higher data rates arise, data loss occurs and parts of the time tags are lost. The hardware allows you to check with timeTagger.getOverflows() whether an overflow condition has occurred. If no overflow is returned, you can be confident that every time tag is received.

Note

When overflows occur, Time Tagger will still produce valid blocks of data and discard the invalid tags in between. Your measurement data may still be valid, albeit, your acquisition time will likely increase.

External Clock Input

The external clock input can be used to synchronize different devices. The input clock frequency must be 10 or 500 MHz for the Time Tagger Ultra.

The CLK input of the Time Tagger Ultra requires 100 mVpp - 3 Vpp AC coupled into 50 Ohm, 500 mVpp are recommended. As soon as this frequency is applied to the EXT CLK input, the Time Tagger Ultra is locked to it. The lock status can be read off the LED color: If the CLK LED shines green, the Time Tagger is locked. If it shines red, a wrong frequency is applied.

Note

The external clock input is only supported for the Time Tagger Ultra, not for the Time Tagger 20.

Performance:

The input clock signal must have a very low jitter to provide the specified performance of the Time Tagger. Please note that the timing specifications for the Time Tagger Ultra with respect to other devices on the same clock are only met from hardware version 2.3 on.

Caution

In order to reach the specified input jitter for the Time Tagger with an external clock, the input signals must be uncorrelated to the external clock.

Synchronization signals - Time Tagger Ultra only

Up to 8 Time Tagger Ultra units can be synchronized in such a way that they behave like a unified Time Tagger. This requires additional hardware, the Swabian Synchronizer. The Synchronizer uses the additional hardware connections: SYNC IN, LOOP IN, LOOP OUT and FDBK OUT (see Synchronizer).

Warning

On Time Tagger Ultra units sold before September 2020, the synchronization signals use the ports labeled AUX IN 1, AUX IN 2, AUX OUT 1, AUX OUT 2. A mapping of the signal names is included in the Synchronizer documentation (see Synchronizer). If you own one of these units and would like to have a sticker to update your labels, please reach out to the Swabian Instruments support .

General purpose IO (GPIO) - Time Tagger Ultra only

Starting from the Time Tagger v2.6.6, the general purpose inputs and outputs on Time Tagger Ultra are used for synchronization signals. New Time Tagger Ultra devices will have an updated labeling of these IO ports. See, Synchronizer

General purpose IO (GPIO) - Time Tagger 20 only

The Time Tagger 20 is equipped with four general purpose io ports that interface directly with the system’s FPGA. These are reserved for future implementations.